2009.9–2013.7 哈尔滨工业大学，本科，电子科学与技术
2013.9–2015.3 复旦大学，硕士，微电子学与固体电子学
2015.5–2019.5 爱尔兰都柏林大学，博士，数字化射频集成电路设计

数字化射频集成电路设计（Digital-RF），包括但不限于：新型相控阵芯片，全数字锁相环，毫米波数字雷达，高性能振荡器，数字化功率放大器等。

2019.5–2020.10 都柏林大学，博士后研究员
2020.10–2022.9 爱尔兰微电子电路中心，责任研究员（PI）
2022.10–至今 中国科学技术大学，特任教授

国家优青（海外）项目入选人

Y. Hu, X. Chen, T Siriburanon, J. Du, V. Govindaraj, A. Zhu and R. B. Staszewski, “A charge-sharing locking technique with a general phase noise theory of injection locking” , IEEE Journal of Solid-State Circuits (JSSC), vol. 57, no. 2, pp. 518–534, Feb. 2022. 
 Y. Hu, T. Siriburanon and R. B. Staszewski, “A low-flicker-noise 30-GHz class-F23 oscillator in 28-nm CMOS using implicit resonance and explicit common-mode return path,” IEEE Journal of Solid-State Circuits (JSSC), vol. 53, no. 7, pp. 1977–1987, July. 2018. (Invited Paper)
 Y. Hu, T. Siriburanon and R. B. Staszewski, “Multirate Timestamp Modeling for Ultra-Low-Jitter Frequency Synthesis: A Tutorial”, IEEE Trans. on Circuits and Systems II (TCAS-II), vol. 69, no. 7, pp. 3030–3036, Jul. 2022. (Invited Paper)
Y. Hu, T. Siriburanon and R. B. Staszewski, “Oscillator flicker phase noise: A tutorial”, IEEE Trans. on Circuits and Systems II (TCAS-II), vol. 68, no. 2 pp. 538–544, Feb. 2021. (Invited Paper)
Y. Hu, T. Siriburanon and R. B. Staszewski, “Intuitive understanding of flicker noise reduction via narrowing of conduction angle in voltage-biased oscillators”, IEEE Trans. on Circuits and Systems II (TCAS-II), vol. 66, no. 12 pp. 1962–1966, Dec. 2019.
 Y. Hu, X. Chen, T. Siriburanon, J. Du, Z. Gao, V. Govindaraj, A. Zhu and R. B. Staszewski, “A 21.7–26.5GHz charge-sharing locking quadrature PLL with implicit digital frequency tracking loop achieving 75fs jitter and -250dB FoM,” Proc. of IEEE Solid-State Circuits Conf. (ISSCC), 18 Feb. 2020, pp. 276–277, sec. 17.6, San Francisco, CA, USA. 
Y. Hu, T. Siriburanon and R. B. Staszewski, “A 30-GHz class-F23 oscillator in 28nm CMOS using harmonic extraction and achieving 120kHz 1/f3 corner,” Proc. of IEEE European Solid-State Circuits Conf. (ESSCIRC), sec. A4L-C1, pp. 87–90, 12 Sept. 2017,Leuven, Belgium.
J. Du, Y. Hu*, T. Siriburanon*, E. Kobal, P. Quinlan A. Zhu and R. B. Staszewski, “A compact 0.2–0.3-V inverse-class-F23 oscillator for low 1/f3 noise over wide tuning range” ,IEEE Journal of Solid-State Circuits (JSSC), vol. 57, no. 2, pp. 452–464, Feb. 2022. (*As corresponding authors)
X. Chen, Y. Hu*, T. Siriburanon*, J. Du, R. B. Staszewski and A. Zhu, “Flicker Phase Noise Reduction Using Gate–Drain Phase Shift in Transformer-Based Oscillators” , IEEE Trans. on Circuits and Systems I (TCAS-I), vol. 69, no. 3, pp. 973–984, Mar. 2022. (*As corresponding authors)
X. Chen, Y. Hu*, T. Siriburanon*, J. Du, R. B. Staszewski and A. Zhu, “A Tiny Complementary Oscillator with 1/f3 Noise Reduction Using a Triple-8-Shaped Transformer”, IEEE Solid-State Circuits Letters (SSC-L), vol. 3, pp. 162–165, 14 Jul. 2020. (*As corresponding authors)